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c us ? dcm ? dc-dc converter isolated, regulated dc converter DCM3623X50M06A8YZZ features & bene?ts ? isolated, regulated dc-dc converter ? up to 180 w, 36.00 a continuous ? 91.9% peak efficiency ? 460 w/in 3 power density ? wide input range 16 C 50 vdc ? safety extra low voltage (selv) 5.0 v nominal output ? 2250 vdc isolation ? zvs high frequency switching n enables low-profile, high-density filtering ? optimized for array operation n up to 8 units C 1440 w n no power derating needed n sharing strategy permits dissimilar line voltages across an array ? fully operational current limit ? ov, oc, uv, short circuit and thermal protection ? 3623 through-hole chip package n 1.524 x 0.898 x 0.284 (38.72 mm x 22.8 mm x 7.21 mm) typical applications ? industrial ? process control ? heavy equipment ? defense / aerospace product description the dcm isolated, regulated dc converter is a dc-dc converter, operating from an unregulated, wide range input to generate an isolated 5.0 vdc output. with its high frequency zero voltage switching (zvs) topology, the dcm converter consistently delivers high e?ciency across the input line range. modular dcm converters and downstream dc-dc products support e?cient power distribution, providing superior power system performance and connectivity from a variety of unregulated power sources to the point-of-load. leveraging the thermal and density bene?ts of vicors chip packaging technology, the dcm module o?ers ?exible thermal management options with very low top and bottom side thermal impedances. thermally-adept chip based power components enable customers to achieve cost e?ective power system solutions with previously unattainable system size, weight and e?ciency attributes, quickly and predictably. product ratings v in = 16 v to 50 v p out = 180 w v out = 5.0 v (4.0 v to 5.5 v trim) i out = 36.00 a dcm? dc-dc converter rev 1.3 page 1 of 25 08/2017 s nrtl cu s part ordering information product function package size package type max input voltage range ratio max output voltage max output power temperature grade option dcm 36 23 x 50 m 06 a8 y zz dcm = dc-dc converter length in mm x 10 width in mm x 10 t = through hole chips internal reference t = -40c C 125c m = -55c C 125c 00 = analog control interface version
dcm? dc-dc converter rev 1.3 page 2 of 25 08/2017 vin load non-isolated point-of-load regulator r1 l1 c1 l2 c out-ext tr en ft +in +out -i n - out dcm load f1 typical application typical application 2: single DCM3623X50M06A8YZZ, to a non-isolated regulator, and direct to load load r1_1 l1_1 c1_1 l2_1 c out-ext-1 c load tr en ft +in +out -i n -out r1_2 l1_2 c1_2 l2_2 c out-ext-2 tr en ft +in +out -in -out r1_4 l1_4 c1_4 l2_4 c out-ext-4 tr en ft +in +out -in -o ut dcm1 dcm2 dcm4 vin f1_1 f1_2 f1_ 4 1+1+1aa 11 DCM3623X50M06A8YZZ
typical application r1_1 l1_1 c1_1 l2_1 c out-ext-1 c load tr en ft +in +out -in -out r1_2 l1_2 c 1_2 l2_2 c out-ext-2 tr en ft +in +out -in -out r1_8 l1_8 c1_8 l2_8 c out-ext-8 tr en ft +in +out -in -out dcm1 dcm2 dcm8 f 1_1 f1_2 f1_8 vin load typical application 3: parallel operation of dcms with common mode chokes installed on the input side to suppress common mode noise dcm? dc-dc converter rev 1.3 page 3 of 25 08/2017 DCM3623X50M06A8YZZ
1 2 a b c d e d c b +in +out top view 3623 chip package a ft en +out -out -out -in tr pin con?guration pin descriptions pin number signal name type function a1 +in input power positive input power terminal b1 tr input enables and disables trim functionality. adjusts output voltage when trim active. c1 en input enables and disables power supply d1 ft output fault monitoring e1 -in input power return negative input power terminal a2, c2 +out output power positive output power terminal b2, d2 -out output power return negative output power terminal dcm? dc-dc converter rev 1.3 page 4 of 25 08/2017 DCM3623X50M06A8YZZ
absolute maximum ratings the absolute maximum ratings below are stress ratings only. operation at or beyond these maximum ratings can cause permanent damage to the device. electrical specifications do not apply when operating beyond rated operating conditions. parameter comments min max unit input voltage (+in to Cin) -0.5 65.0 v input voltage slew rate -1 1 v/s tr to - in -0.3 3.5 v en to -in -0.3 3.5 v ft to -in -0.3 3.5 v 5 ma output voltage (+out to Cout) -0.5 7.2 v dielectric withstand (input to output) basic insulation 2250 vdc internal operating temperature t grade -40 125 c m grade -55 125 c storage temperature t grade -40 125 c m grade -65 125 c average output current 47.5 a figure 2 electrical specified operating area figure 1 thermal specified operating area: max output power vs. case temp, single unit at minimum full load efficiency dcm? dc-dc converter rev 1.3 page 5 of 25 08/2017 DCM3623X50M06A8YZZ
electrical speci?cations specifications apply over all line, trim and load conditions, internal temperature t int = 25oc, unless otherwise noted. boldface specifications apply over the temperature range of -40c < t int < 125c for t grade and -55c < t int < 125c for m grade. attribute symbol conditions / notes min typ max unit power input speci?cation input voltage range v in continuous operation 16 28 50 v inrush current (peak) i inrp with maximum c out-ext , full resistive load 18.0 a input capacitance (internal) c in-int effective value at nominal input voltage 29.7 f input capacitance (internal) esr r cin-int at 1 mhz 0.73 m input inductance (external) l in differential mode, with no further line bypassing 1 h no load speci?cation input power C disabled p q nominal line, see fig. 3 0.4 0.7 w worst case line, see fig. 3 0.9 w input power C enabled with no load p nl nominal line, see fig. 4 2.0 3.8 w worst case line, see fig. 4 4.0 w power output speci?cation output voltage set point v out-nom v in = 28 v, nominal trim, at 100% load, t int = 25c 4.97 5.0 5.03 v rated output voltage trim range v out-trimming trim range over temp, with > 10% rated load. speci?es the low, nominal and high trim conditions. 4.0 5.0 5.5 v output voltage load regulation v out-load linear load line. output voltage increase from full rated load current to no load (does not include light load regulation). see fig. 6 and sec. design guidelines 0.2356 0.2632 0.2910 v output voltage light load regulation v out-ll 0% to 10% load, additional v out relative to calculated load-line point; see fig. 6 and sec. design guidelines -0.00 1.32 v output voltage temperature coef?cient v out-temp nominal, linear temperature coef?cient, relative to t int = 25oc. see fig. 5 and design guidelines section -0.67 mv/c v out accuracy %v out-accuracy the total output voltage setpoint accuracy from the calculated ideal v out based on load, temp and trim. excludes v out-ll -3.0 3.0 % rated output power p out continuous, v out 5.0 v 180 w rated output current i out continuous, v out 5.0 v 36.00 a output current limit i out-lm of rated i out max. fully operational current limit, for nominal trim and below 100 120 131 % current limit delay t iout-lim the module will power limit in a fast transient event 1 ms ef?ciency full load, nominal line, nominal trim 91.2 91.9 % full load, over line and temperature, nominal trim 88.3 % 50% load, over rated line, temperature and trim 85.3 % output voltage ripple v out-pp 20 mhz bandwidth. at nominal trim, minimum c out-ext and at least 10 % rated load 424 mv output capacitance (internal) c out-int effective value at nominal output voltage 152 f output capacitance (internal) esr r cout-int at 1 mhz 0.090 m output capacitance (external) c out-ext excludes component temperature coef?cient for load transients that remain > 10% rated load 1000 20000 f output capacitance (external) c out-ext-trans excludes component temperature coef?cient for load transients down to 0% rated load, with static trim 10000 20000 f output capacitance (external) c out-ext- trans-trim excludes component temperature coef?cient for load transients down to 0% rated load, with dynamic trimming 10000 20000 f dcm? dc-dc converter rev 1.3 page 6 of 25 08/2017 DCM3623X50M06A8YZZ
electrical speci?cations (cont.) specifications apply over all line, trim and load conditions, internal temperature t int = 25oc, unless otherwise noted. boldface specifications apply over the temperature range of -40c < t int < 125c for t grade and -55c < t int < 125c for m grade. attribute symbol conditions / notes min typ max unit power output speci?cations (cont.) output capacitance, esr (ext.) r cout-ext at 10 khz, excludes component tolerances 10 m initialization delay t init see state diagram 25 40 ms output turn-on delay t on from rising edge en, with v in pre-applied. see timing diagram 200 s output turn-off delay t off from falling edge en. see timing diagram 600 s soft start ramp time t ss at full rated resistive load. typ spec is 1-up with min c out-ext . max spec is for arrays with max c out-ext 28 80 ms v out threshold for max rated load current v out-fl-thresh during startup, v out must achieve this threshold before output can support full rated current 3.0 v i out at startup i out-start max load current at startup while v out is below v out-fl_thresh 3.60 a monotonic soft-start threshold voltage v out-monotonic output voltage rise becomes monotonic with 25% of preload once it crosses v out-monotonic 3.0 v minimum required disabled duration t off-min this refers to the minimum time a module needs to be in the disabled state before it will attempt to start via en 2 ms minimum required disabled duration for predictable restart t off-monotonic this refers to the minimum time a module needs to be in the disabled state before it is guaranteed to exhibit monotonic soft-start and have predictable startup timing 100 ms voltage deviation (transient) %v out-trans minimum c out_ext (10 ? 90% load step), excluding load line. <10 % settling time t settle 2.0 ms powertrain protections input voltage initialization threshold v in-init threshold to start t init delay 6 v input voltage reset threshold v in-reset latching faults will clear once v in falls below v in-reset 3 v input undervoltage lockout threshold v in-uvlo- 9.60 15.20 v input undervoltage recovery threshold v in-uvlo+ see timing diagram 16.00 v input overvoltage lockout threshold v in-ovlo+ 55 v input overvoltage recovery threshold v in-ovlo- see timing diagram 50 v output overvoltage threshold v out-ovp from 25% to 100% load. latched shutdown 6.92 v output overvoltage threshold v out-ovp-ll from 0% to 25% load. latched shutdown 7.18 v minimum current limited v out v out-uvp over all operating steady-state line and trim conditions 2.60 v overtemperature threshold (internal) t int-otp 125 c power limit p lim 325 w v in overvoltage to cessation of powertrain switching t ovlo-sw independent of fault logic 2.2 s v in overvoltage response time t ovlo for fault logic only 200 s v in undervoltage response time t uvlo 100 ms short circuit response time t sc powertrain on, operational state 200 s short circuit, or temperature fault recovery time t fault see timing diagram 1 s dcm? dc-dc converter rev 1.3 page 7 of 25 08/2017 DCM3623X50M06A8YZZ
signal speci?cations specifications apply over all line, trim and load conditions, internal temperature t int = 25oc, unless otherwise noted. boldface specifications apply over the temperature range of -40c < t int < 125c for t grade and -55c < t int < 125c for m grade. enable: en ? the en pin enables and disables the dcm converter; when held low the unit will be disabled. ? the en pin has an internal pull-up to vcc and is referenced to the -in pin of the converter. signal type state attribute symbol conditions / notes min nom max unit digital input any en enable threshold v enable-en 2.31 v en disable threshold v enable-dis 0.99 v internally generated v cc v cc 3.21 3.30 3.39 v en internal pull up resistance to v cc r enable-int 9.5 10.0 10.5 k trim: tr ? the tr pin enables and disables trim functionality when v in is initially applied to the dcm converter. when vin ?rst crosses v in-uvlo+ , the voltage on tr determines whether or not trim is active. ? if tr is not ?oating at power up and has a voltage less than tr trim enable threshold, trim is active. ? if trim is active, the tr pin provides dynamic trim control with at least 30hz of -3db control bandwidth over the output voltage of the dcm converter. ? the tr pin has an internal pull-up to v cc and is referenced to the -in pin of the converter. signal type state attribute symbol conditions / notes min nom max unit digital input startup tr trim disable threshold v trim-dis trim disabled when tr above this threshold at power up 3.20 v tr trim enable threshold v trim-en trim enabled when tr below this threshold at power up 3.15 v analog input operational with trim enabled internally generated v cc v cc 3.21 3.30 3.39 v tr pin functional range v trim-range 0.00 2.28 3.16 v v out referred tr pin resolution v out-res with v cc = 3.3 v 20 mv tr internal pull up resistance to v cc r triim-int 9.5 10.0 10.5 k fault: ft ? the ft pin is a fault ?ag pin. ? when the module is enabled and no fault is present, the ft pin does not have current drive capability. ? whenever the powertrain stops (due to a fault protection or disabling the module by pulling en low), the ft pin output vcc and provides current to drive an external ciruit. ? when module starts up, the ft pin is pulled high to v cc during microcontroller initialization and will remain high until soft start process starts. signal type state attribute symbol conditions / notes min nom max unit digital output any ft internal pull up resistance to v cc r fault-int 474 499 524 k ft active ft voltage v fault-active at rated current drive capability 3.0 v ft current drive capability i fault-active over-load beyond the absolute maximum ratings may cause module damage 4 ma ft response time t ft-active delay from cessation of switching to ft pin active 200 s dcm? dc-dc converter rev 1.3 page 8 of 25 08/2017 DCM3623X50M06A8YZZ
high level functional state diagram conditions that cause state transitions are shown along arrows. sub-sequence activities listed inside the state bubbles. latched fault powertrain: stopped ft = true standby powertrain: stopped ft = true application of v in initialization sequence t init delay powertrain: stopped ft = true v in >v in-init soft start v out ramp up t ss delay powertrain: active ft = false running regulates v out powertrain: active ft = false non latched fault t fault powertrain: stopped ft = true non latched fault t off powertrain: stopped ft = true en = true and no faults t on delay t ss expiry en = false t off delay reinitialization sequence t init delay powertrain: stopped ft = true en = false fault removed input ovlo or input uvlo fault removed output ovp output ovp over- temp or output uvp over-temp or output uvp input ovlo or input uvlo en = false t off-min delay en = false t min-off delay v in >v in-uvlo+ and not over-temp tr mode latched ? dc-dc converter rev 1.3 page 9 of 25 08/2017 DCM3623X50M06A8YZZ
v out-nom full load v out v in-uvlo+/- i out full load v out-uvp v in-ovlo+/- v in tr i load input output en 1 input power on - trim inactive 3 tr ignored 4 en low 5 en high 6 input ovlo 7 input uvlo 2 ramp to full load t init t on t ss t off t off t ss t ss t off t off 8 input returned to zero v tr-dis ft t min_off t ss t on v in-init timing diagrams module inputs are shown in blue; module outputs are shown in brown. dcm? dc-dc converter rev 1.3 page 10 of 25 08/2017 DCM3623X50M06A8YZZ
v out-nom full load v out v in-uvlo+/- i out full load v out-uvp v in-ovlo+/- v in tr i load input output en v tr = nom v tr-en v out-ovp 9 input power on - trim active 11 load dump and reverse current 12 vout ovp (primary sensed) 14 current limit with resistive load 15 resistive load with decresing r 10 vout based on v tr t init t on t ss t off t init t on t ss t init t on t ss 13 latched fault cleared t iout-lim 16 overload induced output uvp t fault r load ft v in-init timing diagrams (cont.) module inputs are shown in blue; module outputs are shown in brown. dcm? dc-dc converter rev 1.3 page 11 of 25 08/2017 DCM3623X50M06A8YZZ

figure 4 no load power dissipation vs. v in , at nominal trim

figure 3 disabled power dissipation vs. v in figure 6 ideal v out vs. load current, at 25c case figure 5 ideal v out vs. case temperature, at full load typical performance characteristics the following figures present typical performance at t c = 25oc, unless otherwise noted. see associated figures for general trend data. figure 8 10% to 100% load transient response, v in = 28 v, nominal trim, c out_ext = 1000 f figure 7 100% to 10% load transient response, v in = 28 v, nominal trim, c out_ext = 1000 f dcm? dc-dc converter rev 1.3 page 12 of 25 08/2017 DCM3623X50M06A8YZZ

figure 14 efficiency and power dissipation vs.load at t case = 90c, nominal trim

figure 9 full load efficiency vs. v in , at low trim

figure 10 full load efficiency vs. v in , at nominal trim

figure 11 full load efficiency vs. v in , at high trim

figure 13 efficiency and power dissipation vs.load at t case = 25c, nominal trim

figure 12 efficiency and power dissipation vs.load at t case = -40c, nominal trim typical performance characteristics (cont.) the following figures present typical performance at t c = 25oc, unless otherwise noted. see associated figures for general trend data. dcm? dc-dc converter rev 1.3 page 13 of 25 08/2017 DCM3623X50M06A8YZZ

figure 15 nominal powertrain switching frequency vs. load, at nominal trim figure 16 effective internal input capacitance vs. applied voltage

figure 18 nominal powertrain switching frequency vs. load, at nominal v in typical performance characteristics (cont.) the following figures present typical performance at t c = 25oc, unless otherwise noted. see associated figures for general trend data. figure 19 output voltage ripple, v in = 28 v, v out = 5.0 v, c out_ext = 1000 f, r load = 0.139 figure 17 startup from en, v in = 28 v, c out_ext = 20000 f, r load = 0.139 dcm? dc-dc converter rev 1.3 page 14 of 25 08/2017 DCM3623X50M06A8YZZ
general characteristics specifications apply over all line, trim and load conditions, internal temperature t int = 25oc, unless otherwise noted. boldface specifications apply over the temperature range of -40c < t int < 125c for t grade and -55c < t int < 125c for m grade. attribute symbol conditions / notes min typ max unit mechanical length l 38.34/[1.509] 38.72/[1.524] 39.10/[1.539] mm/[in] width w 22.67/[0.893] 22.8/[0.898] 22.93/[0.903] mm/[in] height h 7.11/[0.28] 7.21/[0.284] 7.31/[0.288] mm/[in] volume vol no heat sink 6.41/[0.39] cm 3 /[in 3 ] weight w 24.0/[0.85] g/[oz] lead ?nish nickel 0.51 2.03 m palladium 0.02 0.15 gold 0.003 0.051 thermal operating internal temperature t int t-grade -40 125 c m-grade -55 125 c thermal resistance top side int-top estimated thermal resistance to maximum temperature internal component from isothermal top 1.89 c/w thermal resistance leads int-leads estimated thermal resistance to maximum temperature internal component from isothermal leads 4.18 c/w thermal resistance bottom side int-bottom estimated thermal resistance to maximum temperature internal component from isothermal bottom 2.26 c/w thermal capacity 17.7 ws/c assembly storage temperature t st t-grade -40 125 c m-grade -65 125 c esd rating hbm method per human body model test esda/jedec jds-001-2012 class 1c v cdm charged device model jesd22-c101e class 2 soldering [1] peak temperature top case for further information, please contact factory applications 135 c [1] product is not intended for re?ow solder attach. dcm? dc-dc converter rev 1.3 page 15 of 25 08/2017 DCM3623X50M06A8YZZ
general characteristics (cont.) specifications apply over all line, trim and load conditions, internal temperature t int = 25oc, unless otherwise noted. boldface specifications apply over the temperature range of -40c < t int < 125c for t grade and -55c < t int < 125c for m grade. attribute symbol conditions / notes min typ max unit safety dielectric withstand test v hipot in to out 2250 vdc in to case 2250 vdc out to case 707 vdc reliability mtbf mil-hdbk-217 fn2 parts count 25c ground benign, stationary, indoors / computer 3.39 mhrs telcordia issue 2, method i case 3, 25c, 100% d.c., gb, gc 5.68 mhrs agency approvals agency approvals/standards en 60950-1 ul 60950-1 ce marked for low voltage directive and rohs recast directive, as applicable previous part number mdcm28ap050m180a50 curus, ctvus, dcm? dc-dc converter rev 1.3 page 16 of 25 08/2017 DCM3623X50M06A8YZZ
pin functions +in, -in input power pins. -in is the reference for all control pins, and therefore a kelvin connection for the control signals is recommended as close as possible to the pin on the package, to reduce effects of voltage drop due to -in currents. +out, -out output power pins. en (enable) this pin enables and disables the dcm converter; when held low the unit will be disabled. it is referenced to the -in pin of the converter. the en pin has an internal pull-up to v cc through a 10 k resistor. n output enable: when en is allowed to pull up above the enable threshold, the module will be enabled. if leaving en floating, it is pulled up to v cc and the module will be enabled. n output disable: en may be pulled down externally in order to disable the module. n en is an input only, it does not pull low in the event of a fault. n the en pins of multiple units should be driven high concurrently to permit the array to start in to maximum rated load. however, the direct interconnection of multiple en pins requires additional considerations, as discussed in the section on array operation. tr (trim) the tr pin is used to select the trim mode and to trim the output voltage of the dcm converter. the tr pin has an internal pull-up to v cc through a 10.0 k resistor. the dcm will latch trim behavior at application of v in (once v in exceeds v in-uvlo+ ), and persist in that same behavior until loss of input voltage. n at application of v in , if tr is sampled at above v trim-dis , the module will latch in a non-trim mode, and will ignore the tr input for as long as v in is present. n at application of v in , if tr is sampled at below v trim-en , the tr will serve as an input to control the real time output voltage, relative to full load, 25c. it will persist in this behavior until v in is no longer present. if trim is active when the dcm is operating, the tr pin provides dynamic trim control at a typical 30 hz of -3db bandwidth over the output voltage. tr also decreases the current limit threshold when trimming above v out-nom . ft (fault) the ft pin provides a fault signal. anytime the module is enabled and has not recognized a fault, the ft pin is inactive. ft has an internal 499 k pull-up to vcc, therefore a shunt resistor, r shunt , of approximately 50 k can be used to ensure the led is completly off when there is no fault, per the diagram below. whenever the powertrain stops (due to a fault protection or disabling the module by pulling en low), the ft pin becomes active and provides current to drive an external circuit. when active, ft pin drives to v cc , with up to 4 ma of external loading. module may be damaged from an over-current ft drive, thus a resistor in series for current limiting is recommended. the ft pin becomes active momentarily when the module starts up. typical external circuits for signal pins (tr, en, ft) 10k r trim vcc tr r series sw r shunt 10k vcc en soft start and fault monitoring vcc ft fault monitoring 499k kelvin -in connection output voltage reference, current limit reference and soft start control dcm? dc-dc converter rev 1.3 page 17 of 25 1903128 DCM3623X50M06A8YZZ
design guidelines building blocks and system design the dcm? converter input accepts the full 16 to 50 v range, and it generates an isolated trimmable 5.0 vdc output. multiple dcms may be paralleled for higher power capacity via wireless load sharing, even when they are operating off of different input voltage supplies. the dcm converter provides a regulated output voltage around defined nominal load line and temperature coefficients. the load line and temperature coefficients enable configuration of an array of dcm converters which manage the output load with no share bus among modules. downstream regulators may be used to provide tighter voltage regulation, if required. the DCM3623X50M06A8YZZ may be used in standalone applications where the output power requirements are up to 180 w. however, it is easily deployed as arrays of modules to increase power handling capacity. arrays of up to eight units have been qualified for 1440 w capacity. application of dcm converters in an array requires no derating of the maximum available power versus what is specified for a single module. note: for more information on operation of single dcm, refer to single dcm as an isolated, regulated dc-dc converter application note an:029. soft start when the dcm starts, it will go through a soft start. the soft start routine ramps the output voltage by modulating the internal error amplifier reference. this causes the output voltage to approximate a piecewise linear ramp. the output ramp finishes when the voltage reaches either the nominal output voltage, or the trimmed output voltage in cases where trim mode is active. during soft-start, the maximum load current capability is reduced. until vout achieves at least v out-fl-thresh , the output current must be less than i out-start in order to guarantee startup. note that this is current available to the load, above that which is required to charge the output capacitor. nominal output voltage load line throughout this document, the programmed output voltage, (either the specified nominal output voltage if trim is inactive or the trimmed output voltage if trim is active), is specified at full load, and at room temperature. the actual output voltage of the dcm is given by the programmed trimmed output voltage, with modification based on load and temperature. the nominal output voltage is 5.0 v, and the actual output voltage will match this at full load and room temperature with trim inactive. the largest modification to the actual output voltage compared to the programmed output is due to the 5.263% v out-nom load line, which for this model corresponds to v out-load of 0.2632v. as the load is reduced, the internal error amplifier reference, and by extension the output voltage, rises in response. this load line is the primary enabler of the wireless current sharing amongst an array of dcms. the load line impact on the output voltage is absolute, and does not scale with programmed trim voltage. for a given programmed output voltage, the actual output voltage versus load current at for nominal trim and room temperature is given by the following equation: v out @ 25 = 5.0 + 0.2632 ? (1 - i out / 36.00) (1) nominal output voltage temperature coefficient a second additive term to the programmed output voltage is based on the temperature of the module. this term permits improved thermal balancing among modules in an array, especially when the factory nominal trim point is utilized (trim mode inactive). this term is much smaller than the load line described above, representing only a -0.67 mv/c change. regulation coefficient is relative to 25c. for nominal trim and full load, the output voltage relates to the temperature according to the following equation: v out-fl = 5.0 -0.666 ? 0.001 ? (t int - 25) (2) where t int is in c. the impact of temperature coefficient on the output voltage is absolute, and does not scale with trim or load. trim mode and output trim control when the input voltage is initially applied to a dcm, and after t init elapses, the trim pin voltage v tr is sampled. the tr pin has an internal pull up resistor to v cc , so unless external circuitry pulls the pin voltage lower, it will pull up to v cc . if the initially sampled trim pin voltage is higher than v trim-dis , then the dcm will disable trimming as long as the v in remains applied. in this case, for all subsequent operation the output voltage will be programmed to the nominal. this minimizes the support components required for applications that only require the nominal rated vout, and also provides the best output setpoint accuracy, as there are no additional errors from external trim components if at initial application of v in , the tr pin voltage is prevented from exceeding v trim-en , then the dcm will activate trim mode, and it will remain active for as long as v in is applied. v out set point under full load and room temperature can be calculated using the equation below: v out-fl @ 25c = 2.89 + (3.060 ? v tr /v cc ) (3) note that the trim mode is not changed when a dcm recovers from any fault condition or being disabled. module performance is guaranteed through output voltage trim range v out-trimming . if v out is trimmed above this range, then certain combinations of line and load transient conditions may trigger the output ovp. overall output voltage transfer function taking load line (equation 1), temperature coefficient (equation 2) and trim (equation 3) into account, the general equation relating the dc v out to programmed trim (when active), load, and temperature is given by: v out = 2.89 + (3.060 ? v tr /v cc ) + 0.2632 ? (1 - i out / 36.00) -0.666 ? 0.001 ? (t int -25) + ? v out-ll (4) finally, note that when the load current is below 10% of the rated capacity, there is an additional ?v which may add to the output voltage, depending on the line voltage which is related to light load boosting. please see the section on light load boosting below for details. use 0 v for ?v out-ll when load is above 10% of rated load. see section on light load boosting operation for light load effects on output voltage. dcm? dc-dc converter rev 1.3 page 18 of 25 08/2017 DCM3623X50M06A8YZZ
output current limit the dcm features a fully operational current limit which effectively keeps the module operating inside the safe operating area (soa) for all valid trim and load profiles. the current limit approximates a brick wall limit, where the output current is prevented from exceeding the current limit threshold by reducing the output voltage via the internal error amplifier reference. the current limit threshold at nominal trim and below is typically 120% of rated output current, but it can vary between 100% to 131%. in order to preserve the soa, when the converter is trimmed above the nominal output voltage, the current limit threshold is automatically reduced to limit the available output power. when the output current exceeds the current limit threshold, current limit action is held off by 1ms, which permits the dcm to momentarily deliver higher peak output currents to the load. peak output power during this time is still constrained by the internal power limit of the module. the fast power limit and relatively slow current limit work together to keep the module inside the soa. delaying entry into current limit also permits the dcm to minimize droop voltage for load steps. sustained operation in current limit is permitted, and no derating of output power is required, even in an array configuration. some applications may benefit from well matched current distribution, in which case fine tuning sharing via the trim pins permits control over sharing. the dcm does not require this for proper operation, due to the power limit and current limit behaviors described here. current limit can reduce the output voltage to as little as the uvp threshold (v out-uvp ). below this minimum output voltage compliance level, further loading will cause the module to shut down due to the output undervoltage fault protection. line impedance, input slew rate and input stability requirements connect a high-quality, low-noise power supply to the +in and Cin terminals. additional capacitance may have to be added between +in and Cin to make up for impedances in the interconnect cables as well as deficiencies in the source. excessive source impedance can bring about system stability issues for a regulated dc-dc converter, and must either be avoided or compensated by filtering components. a 1000 f input capacitor is the minimum recommended in case the source impedance is insufficient to satisfy stability requirements. additional information can be found in the filter design application note: www.vicorpower.com/documents/application_notes/vichip_appnote23.pdf please refer to this input filter design tool to ensure input stability: http://app2.vicorpower.com/filterdesign/intifilter.do . ensure that the input voltage slew rate is less than 1v/us, otherwise a pre-charge circuit is required for the dcm input to control the input voltage slew rate and prevent overstress to input stage components. input fuse selection the dcm is not internally fused in order to provide flexibility in configuring power systems. input line fusing is recommended at the system level, in order to provide thermal protection in case of catastrophic failure. the fuse shall be selected by closely matching system requirements with the following characteristics: n current rating (usually greater than the dcm converters maximum current) n maximum voltage rating (usually greater than the maximum possible input voltage) n ambient temperature n breaking capacity per application requirements n nominal melting i 2 t n recommended fuse: see agency approvals for recommended fuse http://www.vicorpower.com/dc-dc/isolated- regulated/dcm#documentation fault handling input undervoltage fault protection (uvlo) the converters input voltage is monitored to detect an input under voltage condition. if the converter is not already running, then it will ignore enable commands until the input voltage is greater than v in-uvlo+ . if the converter is running and the input voltage falls below v in-uvlo- , the converter recognizes a fault condition, the powertrain stops switching, and the output voltage of the unit falls. input voltage transients which fall below uvlo for less than t uvlo may not be detected by the fault proection logic, in which case the converter will continue regular operation. no protection is required in this case. once the uvlo fault is detected by the fault protection logic, the converter shuts down and waits for the input voltage to rise above v in-uvlo+ . provided the converter is still enabled, it will then restart. input overvoltage fault protection (ovlo) the converters input voltage is monitored to detect an input over voltage condition. when the input voltage is more than the v in-ovlo+ , a fault is detected, the powertrain stops switching, and the output voltage of the converter falls. after an ovlo fault occurs, the converter will wait for the input voltage to fall below v in-ovlo- . provided the converter is still enabled, the powertrain will restart. the powertrain controller itself also monitors the input voltage. transient ovlo events which have not yet been detected by the fault sequence logic may first be detected by the controller if the input slew rate is sufficiently large. in this case, powertrain switching will immediately stop. if the input voltage falls back in range before the fault sequence logic detects the out of range condition, the powertrain will resume switching and the fault logic will not interrupt operation regardless of whether the powertrain is running at the time or not, if the input voltage does not recover from ovlo before t ovlo , the converter fault logic will detect the fault. output undervoltage fault protection (uvp) the converter determines that an output overload or short circuit condition exists by measuring its primary sensed output voltage and the output of the internal error amplifier. in general, whenever the powertrain is switching and the primary-sensed output voltage falls below v out-uvp threshold, a short circuit fault will be registered. once an output undervoltage condition is detected, the powertrain immediately stops switching, and the output voltage of the converter falls. the converter remains disabled for a time t fault . once recovered and provided the converter is still enabled, the powertrain will again enter the soft start sequence after t init and t on . temperature fault protections (otp) the fault logic monitors the internal temperature of the converter. if the measured temperature exceeds t int-otp , a temperature fault is registered. as with the under voltage fault protection, once a dcm? dc-dc converter rev 1.3 page 19 of 25 08/2017 DCM3623X50M06A8YZZ
temperature fault is registered, the powertrain immediately stops switching, the output voltage of the converter falls, and the converter remains disabled for at least time t fault . then, the converter waits for the internal temperature to return to below t int-otp before recovering. provided the converter is still enabled, the dcm will restart after t init and t on . output overvoltage fault protection (ovp) the converter monitors the output voltage during each switching cycle by a corresponding voltage reflected to the primary side control circuitry. if the primary sensed output voltage exceeds v out-ovp , the ovp fault protection is triggered. the control logic disables the powertrain, and the output voltage of the converter falls. this type of fault is latched, and the converter will not start again until the latch is cleared. clearing the fault latch is achieved by either disabling the converter via the en pin, or else by removing the input power such that the input voltage falls below v in-init . external output capacitance the dcm converter internal compensation requires a minimum external output capacitor. an external capacitor in the range of 1000 to 20000 f with esr of 10 m is required, per dcm for control loop compensation purposes. however some dcm models require an increase to the minimum external output capacitor value in certain loading and trim condition. in applications where the load can go below 10% of rated load but the output trim is held constant, the range of output capacitor required is given by c out-ext-trans in the electrical specifications table. if the load can go below 10% of rated load and the dcm output trim is also dynamically varied, the range of output capacitor required is given by c out-ext-trans-trim in the electrical specifications table. light load boosting under light load conditions, the dcm converter may operate in light load boosting depending on the line voltage. light load boosting occurs whenever the internal power consumption of the converter combined with the external output load is less than the minimum power transfer per switching cycle. in order to maintain regulation, the error amplifier will switch the powertrain off and on repeatedly, to effectively lower the average switching frequency, and permit operation with no external load. during the time when the power train is off, the module internal consumption is significantly reduced, and so there is a notable reduction in no-load input power in light load boosting. when the load is less than 10% of rated iout, the output voltage may rise by a maximum of 1.32 v, above the output voltage calculated from trim, temperature, and load line conditions. thermal design based on the safe thermal operating area shown in page 5, the full rated power of the DCM3623X50M06A8YZZ can be processed provided that the top, bottom, and leads are all held below 100c. these curves highlight the benefits of dual sided thermal management, but also demonstrate the flexibility of the vicor chip platform for customers who are limited to cooling only the top or the bottom surface. the otp sensor is located on the top side of the internal pcb structure. therefore in order to ensure effective over-temperature fault protection, the case bottom temperature must be constrained by the thermal solution such that it does not exceed the temperature of the case top. the chip package provides a high degree of flexibility in that it presents three pathways to remove heat from internal power dissipating components. heat may be removed from the top surface, the bottom surface and the leads. the extent to which these three surfaces are cooled is a key component for determining the maximum power that is available from a chip, as can be seen from figure 20. since the chip has a maximum internal temperature rating, it is necessary to estimate this internal temperature based on a real thermal solution. given that there are three pathways to remove heat from the chip, it is helpful to simplify the thermal solution into a roughly equivalent circuit where power dissipation is modeled as a current source, isothermal surface temperatures are represented as voltage sources and the thermal resistances are represented as resistors. figure 20 shows the "thermal circuit" for a 3623 chip dcm, in an application where both case top and case bottom, and leads are cooled. in this case, the dcm power dissipation is pd total and the three surface temperatures are represented as t case_top , t case_bottom , and t leads . this thermal system can now be very easily analyzed with simple resistors, voltage sources, and a current source. this analysis provides an estimate of heat flow through the various pathways as well as internal temperature. alternatively, equations can be written around this circuit and analyzed algebraically: t int C pd 1 ? int-top = t case_top t int C pd 2 ? int-bottom = t case_bottom t int C pd 3 ? int-leads = t leads pd total = pd 1 + pd 2 + pd 3 where t int represents the internal temperature and pd 1 , pd 2 , and pd 3 represent the heat flow through the top side, bottom side, and leads respectively. + C + C + C max internal temp t case_bottom () t leads () t case_top () power dissipation (w) thermal resistance top thermal resistance bottom thermal resistance leads figure 20 double side cooling and leads thermal model + C + C max internal temp t case_bottom () t leads () t case_top () power dissipation (w) thermal resistance top thermal resistance bottom thermal resistance leads figure 21 one side cooling and leads thermal model % 25= =89 c.%a % 25= -8==84 c.%a % 25= 31,0: c.%a % 25= =89 c.%a % 25= -8==84 c.%a nmu? =;)=; ;femwikwi rev 1.3 DCM3623X50M06A8YZZ & .15 /-(,4 7+&6
figure 21 shows a scenario where there is no bottom side cooling. in this case, the heat flow path to the bottom is left open and the equations now simplify to: t int C pd 1 ? int-top = t case_top t int C pd 3 ? int-leads = t leads pd total = pd 1 + pd 3 figure 22 shows a scenario where there is no bottom side and leads cooling. in this case, the heat flow path to the bottom is left open and the equations now simplify to: t int C pd 1 ? int-top = t case_top pd total = pd 1 vicor provides a suite of online tools, including a simulator and thermal estimator which greatly simplify the task of determining whether or not a dcm thermal configuration is sufficient for a given condition. these tools can be found at: www.vicorpower.com/powerbench . array operation a decoupling network is needed to facilitate paralleling: n an output inductor should be added to each dcm, before the outputs are bussed together to provide decoupling. n each dcm needs a separate input filter, even if the multiple dcms share the same input voltage source. these filters limit the ripple current reflected from each dcm, and also help suppress generation of beat frequency currents that can result when multiple powertrains input stages are permitted to direclty interact. if signal pins (tr, en, ft) are not used, they can be left floating, and dcm will work in the nominal output condition. when common mode noise in the input side is not a concern, tr and en can be driven and ft received using a single kelvin connection to the shared -in as a reference. note: for more information on parallel operation of dcms, refer to parallel dcms application note an:030. an example of dcm paralleling circuit is shown in figure 23. recommended values to start with: l1_x: 1 h, minimized dcr; r1_x: 0.3 ; c1_x: ceramic capacitors in parallel, c1 = 20 f; l2_x: l2 0.15 h; c out-ext-x : electrolytic or tantalum capacitor, 1000 f c3 20000 f; c4, c5: additional ceramic /electrolytic capacitors, if needed for output ripple filtering; in order to help sensitive signal circuits reject potential noise, additional components are recommended: r2_x: 301 ohm, facilitate noise attenuation for tr pin; fb1_x, c2_x: fb1 is a ferrite bead with an impedance of at least 10 at 100mhz. c2_x can be a ceramic capacitor of 0.1uf. facilitate noise attenuation for en pin. note: use an rcr filter network as suggested in the application note an:030 to reduce the noise on the signal pins. note: in case of the excessive line inductance, a properly sized decoupling capacitor c decouple is required as shown in figure 23 and figure 24. when common mode noise rejection in the input side is needed, common mode chokes can be added in the input side of each dcm. an example of dcm paralleling circuit is shown below: notice that each group of control pins need to be individually driven and isolated from the other groups control pins. this is because -in of each dcm can be at a different voltage due to the common mode chokes. attempting to share control pin circuitry could lead to incorrect behavior of the dcms. v tr v en +in -in +out -out r1_1 l1_1 c1_1 l2_1 c out-ext-1 c 4c5 tr en ft +in +out -in -out r2_1 c2_1 fb1_1 r1_2 l1_2 c1_2 l2_2 c out-ext-2 tr en ft +in +out -in -out r2_2 c2_2 fb1_2 r1_8 l1_8 c1_8 l2_8 c out-ext-8 tr en ft +in +out -in -out r 2_8 c2_8 fb1_8 dcm1 dcm2 dcm8 r4 r3 d1 shared -in kelvin f 1_1 f1_2 f1_8 c decouple figure 23 dcm paralleling con?guration circuit 1 + C max internal temp t case_bottom () t leads () t case_top () power dissipation (w) thermal resistance top thermal resistance bottom thermal resistance leads figure 22 one side cooling thermal model % 25= =89 c.%a % 25= -8==84 c.%a % 25= 31,0: c.%a nmu? =;)=; ;femwikwi rev 1.3 DCM3623X50M06A8YZZ + v tr8 _ v en8 +in -in +out -out r1_1 l1_1 c1_1 l2_1 c out-ext-1 c 4c5 tr en ft + in +out -in -o ut r2_1 r sgnd1 1_2 l 1_2 c1_2 l2_2 c out-ext-2 tr en ft +in +out -in -o ut r2_2 r1_8 l1_8 c1_8 l2_8 c out-ext-8 tr en ft +in +out -in -out r2_8 c2_8 fb1_8 dcm1 dcm2 dcm8 r4_8 r3_8 d1_8 c 2_2 fb1_2 r4_2 r3_2 d1_2 c2_1 fb1_1 r4_1 r3_1 d1_1 f1_1 f 1_2 f1_8 c decouple + _ sgnd2 sgnd8 sgnd8 + v t r2 _ v en2 1 + _ sgnd2 + v t r1 _ v en + _ sgnd1 figure 24 dcm paralleling con?guration circuit 2
an array of dcms used at the full array rated power may generally have one or more dcms operating at current limit, due to sharing errors. load sharing is functionally managed by the load line. thermal balancing is improved by the nominal effective temperature coefficient of the output voltage setpoint. dcms in current limit will operate with higher output current or power than the rated levels. therefore the following thermal safe operating area plot should be used for array use, or loads that drive the dcm in to current limit for sustained operation. figure 25 thermal speci?ed operating area: max power dissipation vs. case temp for arrays or current limited operation dcm? dc-dc converter rev 1.3 page 22 of 25 08/2017 DCM3623X50M06A8YZZ
dcm module product outline drawing recommended pcb footprint and pinout 38.72?38 1.524?015 19.36 .762 11.40 .449 22.80?13 .898?005 0 0 0 0 top view (component side) 1.52 .060 (2) pl. 1.02 .040 (3) pl. 1.52 .060 (4) pl. 11.43 .450 0 2.75 .108 8.25 .325 2.75 .108 8.25 .325 8.00 .315 1.38 .054 1.38 .054 4.13 .162 8.00 .315 0 18.60 .732 18.60 .732 0 0 bottom view .41 .016 (9) pl. 7.21?10 .284?004 4.17 .164 (9) pl. seating . plane .05 [.002] 2.03 .080 plated thru .38 [.015] annular ring (4) pl. 2.03 .080 plated thru .25 [.010] annular ring (2) pl. 1.52 .060 plated thru .25 [.010] annular ring (3) pl. 0 8.00?08 .315?003 1.38?08 .054?003 1.38?08 .054?003 4.13?08 .162?003 8.00?08 .315?003 8.25?08 .325?003 2.75?08 .108?003 2.75?08 .108?003 8.25?08 .325?003 0 18.60?08 .732?003 18.60?08 .732?003 0 recommended hole pattern (component side) 0 +in tr en ft -in +out +out -out -out notes: 1- ro hs compliant per cst-0001 latest revision. dcm? dc-dc converter rev 1.3 page 23 of 25 08/2017 DCM3623X50M06A8YZZ
revision history revision date description page number(s) 1.0 09/19/16 release of current data sheet with new part number n/a 1.1 01/20/17 updated powertrain protection specs 7 1.2 04/28/17 added 2 decimal points to the uvlo and ovlo powertrain protection specifications 7 updated typical applications 1 1.3 08/04/17 updated height and length specifications 15 updated mechanical drawing 23 dcm? dc-dc converter rev 1.3 page 24 of 25 08/2017 DCM3623X50M06A8YZZ
vicors comprehensive line of power solutions includes high density ac-dc and dc-dc modules and accessory components, fully configurable ac-dc and dc-dc power supplies, and complete custom power systems. information furnished by vicor is believed to be accurate and reliable. however, no responsibility is assumed by vicor for its use. vicor makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication. vicor reserves the right to make changes to any products, specifications, and product descriptions at any time without notice. information published by vicor has been checked and is believed to be accurate at the time it was printed; however, vicor assumes no responsibility for inaccuracies. testing and other quality controls are used to the extent vicor deems necessary to support vicors product warranty. except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. specifications are subject to change without notice. visit http://www.vicorpower.com/dc-dc/isolated-regulated/dcm for the latest product information. vicors standard terms and conditions and product warranty all sales are subject to vicors standard terms and conditions of sale, and product warranty which are available on vicors webpage ( http://www.vicorpower.com/termsconditionswarranty ) or upon request. life support policy vicors products are not authorized for use as critical components in life support devices or systems without the express prior written approval of the chief executive officer and general counsel of vicor corporation. as used herein, life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user. a critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness. per vicor terms and conditions of sale, the user of vicor products and components in life support applications assumes all risks of such use and indemnifies vicor against all liability and damages. intellectual property notice vicor and its subsidiaries own intellectual property (including issued u.s. and foreign patents and pending patent applications) relating to the products described in this data sheet. no license, whether express, implied, or arising by estoppel or otherwise, to any intellectual property rights is granted by this document. interested parties should contact vicors intellectual property department. the products described on this data sheet are protected by the following u.s. patents numbers: re40,072; 7,561,446; 7,920,391; 7,782,639; 8,427,269; 6,421,262 and other patents pending. contact us: http://www.vicorpower.com/contact-us vicor corporation 25 frontage road andover, ma, usa 01810 tel: 800-735-6200 fax: 978-475-6715 www.vicorpower.com email customer service: custserv@vicorpower.com technical support: apps@vicorpower.com dcm? dc-dc converter rev 1.3 page 25 of 25 08/2017 DCM3623X50M06A8YZZ ?2017 vicor corporation. all rights reserved. the vicor name is a registered trademark of vicor corporation. all other trademarks, product names, logos and brands are property of their respective owners.

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